LDO_MAIN_CONT=Val_0b000, LPCOMP_CLK_SEL=Val_0, BOD_THRESH=Val_0b000, AON_BG_CONT=Val_0b0000, BOD_HYST=Val_0b000, AON_LDO_CONT=Val_0b0000
VBAT Analog Control Register 3
| LDO_MAIN_CONT | PMU 1.8-V LDO (LDO-3) output voltage control: Step = 21.43 mV 0 (Val_0b000): 1.71 V 7 (Val_0b111): 1.86 V |
| BOD_EN | Enables brown-out detector. |
| BOD_HYST | Control for BOD hysteresis: Step: 22.857 mV 0 (Val_0b000): 0 mV 7 (Val_0b111): 160 mV |
| BOD_THRESH | Control for BOD threshold level: Step: 22.857 mV 0 (Val_0b000): 1.585 V 7 (Val_0b111): 1.745 V |
| MRAM_VREF_EN | Enables MRAM VREF block |
| MRAM_CTRIM | MRAM curvature trim |
| MRAM_VTRIM | MRAM offset trim |
| AON_BG_CONT | AON bandgap voltage trim: Step: 10 mV 0 (Val_0b0000): 830 mV 15 (Val_0b1111): 685 mV |
| AON_LDO_CONT | AON LDO (LDO-1) output voltage trim: Step: 10.67 mV 0 (Val_0b0000): 660 mV 15 (Val_0b1111): 820 mV |
| LPCOMP_CLK_SEL | Selects clock source for LPCMP: 0 (Val_0): 32-kHz XTAL oscillator (LFXO) 1 (Val_1): 32-kHz RC oscillator (LFRC) |